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value of I2Cn_STATE will then be 0x57. As seen in the table, the I C module also stops in this state if
to continue transmission. This is not standard I C, but is provided for flexibility. The rest of the options
Table 15.4. I C Master Transmitter
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2
the address is not available after a repeated start condition.
To continue, write a byte to I2Cn_TXDATA with the address of the slave in the 7 most significant bits
and the least significant bit cleared (ADDR+W). This address will then be transmitted, and the slave will
reply with an ACK or a NACK. If no slave replies to the address, the response will also be NACK. If
the address was acknowledged, the master now has four choices. If another byte is made available in
I2Cn_TXDATA, this byte is transmitted. The master can also stop the transmission by sending a STOP,
it can send a repeated start by sending START, or it can send a STOP and then a START as soon
as possible.
If a NACK was received, the master has to issue a CONT command in addition to providing data in order
2
are similar to when an ACK was received.
If a new byte was transmitted, an ACK or NACK is received after the transmission of the byte, and the
master has the same options as for when the address was sent.
The master may lose arbitration at any time during transmission. In this case, the ARBLOST interrupt flag
in I2Cn_IF is set. If the arbitration was lost during the transfer of an address, and SLAVE in I2Cn_CTRL
is set, the master then checks which address was transmitted. If it was the address of the master, then
the master goes to slave mode.
After a master has transmitted a START and won any arbitration, it owns the bus until it transmits a
STOP. After a STOP, the bus is released, and arbitration decides which bus master gains the bus next.
The MSTOP interrupt flag in I2Cn_IF is set when a STOP condition is transmitted by the master.
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I2Cn_STATEDescription
I2Cn_IF
Required
Response
interaction
0x57
Start transmitted
START interrupt flag
ADDR
ADDR+W will be sent
(BUSHOLD interrupt
flag)
+W ->
TXDATA
STOP
STOP +
START
STOP will be sent and bus released.
STOP will be sent and bus released. Then a
START will be sent when bus becomes idle.
0x57
Repeated start
transmitted
START interrupt flag
(BUSHOLD interrupt
ADDR
+W ->
ADDR+W will be sent
flag)
TXDATA
STOP
STOP +
START
STOP will be sent and bus released.
STOP will be sent and bus released. Then a
START will be sent when bus becomes idle.
-
ADDR+W transmitted
TXBL interrupt flag
None
(TXC interrupt flag)
0x97
ADDR+W transmitted,
ACK interrupt flag
TXDATA
DATA will be sent
ACK received
(BUSHOLD interrupt
flag)
STOP
START
STOP +
START
STOP will be sent. Bus will be released
Repeated start condition will be sent
STOP will be sent and the bus released. Then
a START will be sent when the bus becomes
idle
0x9F
ADDR+W
transmitted,NACK
NACK (BUSHOLD
interrupt flag)
CONT +
TXDATA
DATA will be sent
received
STOP
STOP will be sent. Bus will be released
2011-04-12 - d0001_Rev1.10
154
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